Flash Technology Features
NAND Flash memory cells are subject to wear, potentially causing random errors in the stored data. GOODRAM Industrial implements advanced error detection and correction algorithms (LDPC/BCH) appropriate for the used technology. This guarantees a high level of data security up to the specified TBW.
NAND Flash memories have a limited number of program/erase cycles. To ensure product longevity, data must be evenly distributed between the memory blocks. GOODRAM Industrial memories implement advanced wear leveling algorithms for this purpose. This means that the fixed flash blocks will not wear out due to repeated writing to a particular address location.
In NAND Flash memory units, certain memory blocks may be rendered unusable. This occurs during manufacturing of the devices and during their subsequent use, for instance as a result of wear. Such blocks must be excluded from use. Methods of fault prediction and exclusion of unusable memory blocks are implemented in all GOODRAM Industrial Flash products.
S.M.A.R.T. (Self-Monitoring Analysis and Reporting Technology) is a technology for self- diagnosis and reporting oriented towards the prediction and detection of basic faults. In the case of SSDs, the self-diagnosis results and wear statistics can be accessed via a standardized interface. In the case of memory cards, such as SD, access to this data requires the use of special software.
TRIM is a command defined by the ATA standard, enabling the operating system to inform the SSD controller which sectors contain expired data, so that the flash wear levelling algorithm does not transfer expired data between blocks. It can significantly increase the lifetime of SSD.
This term refers to the memory capacity not available to the user . Thanks to the limit on available capacity, mechanisms used for organizing the stored data are used less frequently, leading to increased operations per second (IOPS) and reduction in write amplification. This results in faster write speeds and longer device lifetime.
The SATA interface utilizes two reduced power modes: partial and slumber. In partial mode the power consumed by the interface is limited to a few tens of mW and the wake-up time is not more than 10 μs. In slumber mode the power consumption is further reduced and the wake-up time may be up to 10 ms. Partial and slumber modes may be initiated by the host computer (HIPM) or by the storage device (DIPM). SSDs may also offer a DevSleep mode, resulting drive to go into a deep “device sleep” significantly reducing power consumption. Reduced power modes enable mobile devices to operate for longer without recharging.